Barco Silex Part of Major VSF J2K Interop Event

Louvain-la-Neuve, March 11, 2014 – Barco Silex, the leading provider of JPEG 2000 compression IP cores and solutions, announced today successful participation to the major Interop Event organized by the Video Service Forum (VSF) during its VidTrans 2014 meeting in Arlington, VA on February 26 to 28. This was the largest technology demonstration ever held for motion JPEG2000 (J2K) technology.

Barco Silex successfully demonstrated its J2K technology, including its own Transport Stream layer solution, together with Xilinx® SMPTE 2022 cores, running on a Zynq-7045 All Programmable SoC platform, and based on the Video over IP reference design developed jointly by the 2 companies for the broadcast market. “The very close collaboration between our design team and Xilinx SMPTE 2022 team during our joint reference design development has led to an efficient and performing implementation of the whole video over IP chain, both on the encoder and the decoder side”, said Jean-Marie Cloquet, Manager of the image processing division of Barco Silex. “The proven interoperability of our design with the equipment’s of many major players of the broadcast market is the best demonstration of the effective conformance of our JPEG 2000 and Transport Stream solution with the broadcast profile recommended by VSF.”

“We are delighted that the reference design developed with Certified Alliance Program Member Barco Silex is now a proven interoperable solution for the industry.” added Rob Green, senior manager of Broadcast & Pro A/V Marketing at Xilinx. “Interoperability is key as the transition to all-IP workflows and transport networks continues with a combination of innovation and uncertainty and, whether compressed or uncompressed, having a solid yet programmable foundation for moving and manipulating media streams enables our customers and broadcasters to focus on delivering better quality content with much faster time to market“.

The Barco Silex reference design integrates its JPEG 2000 Encoder and Decoder IP Cores, its high-performance memory controller core, along with the SMPTE 2022-1/2 and Ethernet MAC LogiCORE™ IP Cores from Xilinx now available for both Xilinx 7 Series FPGAs and Zynq® All Programmable SoCs. The design is able to encapsulate and de-encapsulate High Definition streams (1080p60), to compress or decompress those streams with JPEG 2000, and to transport them over 1Gb/s Ethernet. The Barco Silex high-performance memory controller stitches multiple video streams of bandwidth together into a smooth, high-data rate system. Also integrated in the reference design is the JPEG 2000 codestream wrapping in MPEG-2 TS, compliant with the VSF (Video Services Forum) Technical Recommendation “Transport of JPEG 2000 Broadcast profile video in MPEG-2 TS over IP”.

Barco Silex will showcase its JPEG 2000 and Video over IP solutions at the NAB tradeshow next month in Las Vegas (Booth C 4743).

About Barco Silex

Barco Silex is the leader in video processing, encryption and security IP cores and platforms as well as electronic design services (ASIC, FPGA, DSP, Board). The full-range of Barco Silex JPEG 2000 IP cores enable high-performance and high-quality coding and support a wide range of features and options: ultra-low latency, mathematically lossless compression, multichannel HD, 2K, 4K, 8K, UHD. The video platforms integrate a full-range of networking and video compression modules and enable customers to accelerate their product developments. Barco Silex security platforms and encryption cores deliver unrivaled speed performance and compact footprint.

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