1T-OTP macros, ideal for mobile computing and communications applications, meet all TSMC9000 Quality Management Program requirements for 28HPL, 28HPM and 28HPC Processes
Ottawa, Canada – May 29, 2014 - Sidense Corp., a leading developer of non-volatile memory OTP IP cores, today announced that the Company’s 1T-OTP macros for TSMC’s 28nm HPL, HPM and HPC processes have met all TSMC9000 Quality Management Program requirements. Applications for Sidense SHF memory IP include code storage, ROM replacement, secure encryption key storage, configuration, fuse replacement, trimming and calibration.
“High performance and low power are critical for leading-edge applications such as mobile computing and hand-held communications,” said Xerxes Wania, President and CEO of Sidense. “We have worked closely with TSMC to give our common customers the competitive edge they need when using secure and reliable embedded NVM that is fully compliant with TSMC’s TSMC9000 program for high-quality IP. Several customers have already licensed our 28nm 1T-OTP macros for their leading-edge designs.”
Optimized for high-performance and a wide range of bit densities, Sidense SHF macros are available for standard CMOS processes. There are no requirements for any additional masks or processing steps.
SHF memory IP is a complete, non-volatile memory (NVM) subsystem providing interfaces and features to support a range of embedded integrated circuit applications. SHF macros feature high security, very low power, fast programming speed, field-programmability, low read voltage and several read modes to optimize read performance and macro area. The SHF module integrates the OTP memory and Integrated Power Supply (IPS) hard macro blocks along with program control, programming and test interface, error correction and Built-In Self-Test (BIST) supplied in RTL.
SHF is a well-proven design having already been deployed in high volume at 40nm. As the chosen solution for advanced nodes, SHF 1T bit-cell architecture development is at an advanced stage in even more advanced nodes including 20nm and 16nm FinFET.
SHF memory macros are suitable for a wide range of applications from mobile communications to the expanding IoT ecosystem.
TSMC’s 28nm low-power with high-k metal gate (HPL) technology adopts the same gate stack as the foundry’s HP technology while meeting more stringent low-leakage requirements with a minimal tradeoff of performance speed. 28HPM is ideal for many applications from networking and tablet, to mobile consumer products. 28HPC is a new compact version of 28HPM with tightened SPICE model corners and relaxed design rules. Compared to 28HPM, 28HPC shows improvements in both performance and power dissipation.
“Sidense offers a wide range of OTP solutions in multiple TSMC processes, including our 28nm High-K Metal Gate,” said Suk Lee, TSMC Senior Director, Design Infrastructure Marketing Division. “This variety allows customers to choose and build the optimal solution for their next-generation products.”
About Sidense Corp.
Sidense Corp. provides very dense, highly reliable and secure non-volatile one-time programmable (OTP) Logic Non-Volatile Memory (LNVM) IP for use in standard-logic CMOS processes. The Company, with over 120 patents granted or pending, licenses OTP memory IP based on its innovative one-transistor 1T-Fuse™ bit cell, which does not require extra masks or process steps to manufacture. Sidense 1T-OTP macros provide a better field-programmable, reliable and cost-effective solution than flash, mask ROM, eFuse and other embedded and off-chip NVM technologies for many code storage, encryption key, analog trimming and device configuration uses.
Over 120 companies, including many of the top fabless semiconductor manufacturers and IDMs, have adopted Sidense 1T-OTP as their NVM solution for more than 360 designs. Customers are realizing outstanding savings in solution cost and power consumption along with better security and reliability for applications ranging from mobile and consumer devices to high-temperature, high-reliability automotive and industrial electronics. The IP is offered at and supported by all top-tier semiconductor foundries and selected IDMs. Sidense is headquartered in Ottawa, Canada with sales offices worldwide. For more information, please visit www.sidense.com.