Small-size ISP (Image Signal Processing) IP ideal for AI camera systems.
After Moore's Law: More With Less
Brian Bailey (Semiconductor Engineering)
July 10th, 2014
There are so many new twists and opportunities that the industry may not miss the waning influence of shrinking features every couple years.
In the decades when Moore’s Law went unquestioned, the industry was able to migrate to the next smaller node and receive access to more devices that could be used for increased functionality and additional integration. While less significant transistor-level power savings have been seen from the more recent nodes, as leakage currents have increased, the additional levels of integration have brought down or eliminated many of the most power-hungry functions.
If Moore’s Law is slowing down, or even coming to an end for some companies and applications, what impact will this have on the design of systems? Will we have to spend more time refining the design itself so that it uses less area? Will we have to continue to find better ways to reduce power consumption? And are there better ways in which integration can be performed? Semiconductor Engineering has been asking the industry about the implications for an end to Moore’s Law, and in this article we will examine the effects it may have on semiconductor design companies and the IP industry.
Related News
Breaking News
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- SEMIFIVE Starts Mass Production of its 14nm AI Inference SoC Platform based Product
- VeriSilicon's complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
- TASKING and Andes Announce FuSa Compliant Compiler Support for Andes RISC-V ASIL Compliant Automotive IP
- Efabless Launches an "AI Wake Up Call" Open-Source Silicon Design Challenge
Most Popular
- Qualitas Semiconductor and Ambarella Sign Licensing Agreement
- ZeroPoint Technologies Signs Global Customer to Bring Hardware-Accelerated Compression to Hyperscale Data Centers
- Chiplet Interconnect Pioneer Eliyan Closes $60 Million Series B Funding Round, Co-led by Samsung Catalyst Fund and Tiger Global Management to Address Most Pressing Challenge in Development of Generative AI Chips
- Intel and Arm Team Up to Power Startups
- Alphawave Semi and InnoLight Collaborate to Demonstrate Low Latency Linear Pluggable Optics with PCIe 6.0® Subsystem Solution for High-Performance AI Infrastructure at OFC 2024
E-mail This Article | Printer-Friendly Page |