Dolphin Integration's memories silicon proven at TSMC 90 nm eFlash
Grenoble, France – June 1st, 2015 -- Dolphin Integration is proud to announce that their memory offering at 90 nm eFlash process have fully passed the various stages of TSMC 9000 qualification. This guarantees innovative solutions with minimal risks and maximum reliability.
Dolphin Integration’s SpRAM RHEA, 1PRFile AURA, 2PRFile/DpRAM ERIS and sROMet PHOENIX are silicon proven to support smartcard, home application and more generally all MCU designs that need the best trade-off between area and power consumption.
As part of the partnership between TSMC and Dolphin Integration, these memories are available in TSMC’s sponsored program and enable to address true High Density and Low Power challenges through main key benefits:
- SpRAM RHEA achieves up to 10% area savings*, ultra low leakage current, and drastically decreased dynamic power consumption,
- 1PRFile AURA generator enables up to 30% area savings* and ultra low leakage,
- 2PRFile/DpRAM ERIS proposes a trade-off between speed and ultra low leakage thanks to various VT options,
- sROMet PHOENIX contributes to 5-10 % gain in density* with a denser architecture for metal programmable ROM.
*Comparison with standard solutions
More importantly, Dolphin Integration offers a wide range of qualified memories and standard cell libraries so as to offer Off-the-Shelf products endowed with differentiated optimizations to address a diversity of SoC requirements.
For a true power consumption optimization, these libraries can be delivered with their relevant voltage regulators thanks to the innovative offering of Reusable Power Kit Libraries.
For further information on these memory and standard cell libraries, click here or contact libraries@dolphin.fr.
About Dolphin Integration
Dolphin Integration contributes to "enabling mixed signal Systems-on-Chip" for worldwide customers - up to the major actors of the semiconductor industry - with Silicon IP components best at low-power consumption.
This wide offering is based on innovative libraries of standard cells, register files, memory generators and power regulators. Complete networks for power supply can be flexibly assembled together with their loads: from high-resolution converters for audio and measurement applications to power-optimized micro-controllers of 8 or 16 and 32 bits.
Over 30 years of diverse experiences in the integration of silicon IP components and providing services for ASIC/SoC design and fabrication, with its own EDA solutions solving unaddressed challenges, make Dolphin Integration a genuine one-stop shop covering all customers’ needs for specific requests.
The company striving to incessantly innovate for its customers’ success has led to two strong differentiators:
- state-of-the-art “configured subsystems” for high-performance applications securing the most competitive SoC architectural solutions,
- a team of Integration and Application Engineers supporting each user’s need for optimal application schematics, demonstrated through EDA solutions enabling early performance assessments
Its social responsibility has been from the start focused on the design of integrated circuits with low-power consumption, placing the company in the best position to now contribute to new applications for general power savings through the emergence of the Internet of Things.
|
Dolphin Design Hot IP
Related News
- Ultra high density standard cell library SESAME uHD-BTF to enrich Dolphin Integration's panoply at TSMC 90 nm eF and uLL
- Dolphin Integration announce the availability of the TSMC sponsored sROMet and DpRAM generators at 90 nm LP eFlash
- Proven on silicon: A Panoply of Memories and Standard Cells of Dolphin Integration to divide dynamic power by 5 at 180 nm!
- INGChips selects Dolphin Integration's Power Management IP Platform for its ultra Low Power Bluetooth Low-Energy SoC in 40 nm eFlash
- Dolphin Integration augments the TSMC IP Ecosystem at 40 nm ULP eFlash with new TITAN Read Only Memory
Breaking News
- Numem at the Design & Reuse IP SoC Silicon Valley 2024
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- TSMC Celebrates 30th North America Technology Symposium with Innovations Powering AI with Silicon Leadership
- Keysight, Synopsys, and Ansys Deliver Radio Frequency Design Migration Flow to TSMC's N6RF+ Process Node
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
Most Popular
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Qualitas Semiconductor Appoints HSRP as its Distributor for the China Markets
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
E-mail This Article | Printer-Friendly Page |