MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes in TSMC (16nm) for Automotive
Google, HP, Oracle Join RISC-V
Open source processor core gains traction
Rick Merritt
EETimes (12/28/2015 08:00 AM EST)
SAN JOSE, Calif. – RISC-V is on the march as an open source alternative to ARM and Mips. Fifteen sponsors, including a handful of high tech giants, are queuing up to be the first members of its new trade group which will host next week its third workshop for the processor core.
RISC V is the latest evolution of the original RISC core developed more than 25 years ago by Berkeley’s David Patterson and Stanford’s John Hennessey. In August 2014, Patterson and colleagues launched an open source effort around the core as an enabler for a new class of processors and SoCs with small teams and volumes that can’t afford licensed cores or get the attention of their vendors.
E-mail This Article | Printer-Friendly Page |
|
Related News
- Qualcomm to Bring RISC-V Based Wearable Platform to Wear OS by Google
- Leading Semiconductor Industry Players Join Forces to Accelerate RISC-V
- Andes Technology and Deeplite, INC. Join Forces To Deploy Highly Compact Deep Learning Models Into Daily Life
- Antmicro and SiFive join forces to propose complete RISC-V offering
- Qualcomm Vets Join Blockchain RISC-V Chip Developer
Breaking News
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- VeriSilicon's complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
- TASKING and Andes Announce FuSa Compliant Compiler Support for Andes RISC-V ASIL Compliant Automotive IP
- Efabless Launches an "AI Wake Up Call" Open-Source Silicon Design Challenge
- Efinix Rolls Out Line of FPGAs to Accelerate and Adapt Automotive Designs and Applications
Most Popular
- Qualitas Semiconductor and Ambarella Sign Licensing Agreement
- ZeroPoint Technologies Signs Global Customer to Bring Hardware-Accelerated Compression to Hyperscale Data Centers
- Chiplet Interconnect Pioneer Eliyan Closes $60 Million Series B Funding Round, Co-led by Samsung Catalyst Fund and Tiger Global Management to Address Most Pressing Challenge in Development of Generative AI Chips
- Intel and Arm Team Up to Power Startups
- Alphawave Semi and InnoLight Collaborate to Demonstrate Low Latency Linear Pluggable Optics with PCIe 6.0® Subsystem Solution for High-Performance AI Infrastructure at OFC 2024