NXP Selects Synopsys As Primary SoC Verification Solution
Comprehensive Synopsys Solution Enables Accelerated Verification of Next-Generation SoCs including Automotive, Secure Connectivity and Smart Connected Products
MOUNTAIN VIEW, Calif., June 6, 2016 -- Synopsys, Inc. (NASDAQ: SNPS) today announced that it was selected by NXP Semiconductor as its primary system-on-chip (SoC) verification solution for automotive and secure connectivity applications. Synopsys' comprehensive verification solution will be of primary use for the entire SoC verification cycle, including simulation, debug, formal verification, static verification, verification IP, emulation, and verification coverage. Synopsys' leadership position in all of these critical verification technology areas, combined with native integrations between these products, enables NXP to have increased verification performance, productivity, faster coverage closure, and accelerated time-to-market.
"The requirements for safety and security are driving a 10X increase in verification complexity for our leading-edge SoCs," said Chris Collins, senior vice president, product & technology enablement at NXP. "Synopsys is uniquely positioned to address this explosion in verification complexity, with its breadth of leading verification technologies and integrations, to enable our teams with the performance and productivity required to tackle verification intricacies for our next-generation SoCs."
With the exponential growth of the verification complexity in advanced SoCs, achieving verification closure requires a broad set of technologies including advanced simulation, advanced debug, static and formal verification, verification IP and coverage closure. To address this substantial complexity, Synopsys continues to have the largest R&D investment in verification spanning the entire verification flow. This includes the industry-leading VCS simulation, Verdi® Advanced Debug, and SpyGlass® RTL Signoff solutions, as well as next-generation solutions in formal verification with VC Formal, verification IP with VC VIP, low-power verification, and functional safety verification. The native integration of these verification solutions further enable SoC teams to achieve faster performance and higher productivity leading to accelerated coverage closure.
"Collaboration with industry leaders in SoC design has been key to our continued leadership and innovation in verification," said Manoj Gandhi, executive vice president and general manager for the Synopsys Verification Group. "Over the past few years, we've built a strong portfolio of leading-edge verification software technologies. As the primary verification solution for NXP, we are taking our collaboration to the next-level to further address their growing SoC verification complexity."
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.
|
Synopsys, Inc. Hot Verification IP
Related News
- Synopsys Announces Industry's First CXL 2.0 VIP Solution for Breakthrough SoC Performance
- SiFive Selects Synopsys Fusion Design Platform and Verification Continuum Platform to Enable Rapid SoC Design
- NXP to Adopt Synopsys' Native Automotive Design Solutions for Next-generation Safety-critical SoCs
- Synopsys Design and Verification Solutions Enable Astera Labs to Develop Industry's First PCIe 5.0 Retimer SoC
- Samsung SARC Selects Synopsys as Primary Verification Solution for Advanced Mobile Processor Designs
Breaking News
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- SEMIFIVE Starts Mass Production of its 14nm AI Inference SoC Platform based Product
- VeriSilicon's complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
- TASKING and Andes Announce FuSa Compliant Compiler Support for Andes RISC-V ASIL Compliant Automotive IP
- Efabless Launches an "AI Wake Up Call" Open-Source Silicon Design Challenge
Most Popular
- Intel and Arm Team Up to Power Startups
- Chiplet Interconnect Pioneer Eliyan Closes $60 Million Series B Funding Round, Co-led by Samsung Catalyst Fund and Tiger Global Management to Address Most Pressing Challenge in Development of Generative AI Chips
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- Renesas Introduces Industry's First General-Purpose 32-bit RISC-V MCUs with Internally Developed CPU Core
- SmartSoC Solutions Joins TSMC Design Center Alliance to Boost Semiconductor Innovation in India
E-mail This Article | Printer-Friendly Page |