IP Business Should Learn from EDA's Playbook
Dylan McGrath, Contributing Editor, EETimes
6/15/2016 04:25 PM EDT
Industry veteran sees parallels between IP's opportunity, EDA's rise.
Don’t try to tell Charlie Janac that the electronic design automation and semiconductor intellectual property businesses are branches of the same tree. Janac, who is more than 30 years into a career spanning both disciplines, believes that while the histories of EDA and IP are intertwined, they are not the same.
”I will maintain until my dying day that IP and EDA are very different,” Janac told EE Times in a recent interview. “There’s a huge difference between helping someone do a chip and actually being in the chip.”
But Janac, president and CEO of interconnect IP supplier Arteris Inc., does see parallels between the current state of the IP business and where EDA was 30 years ago. Back then, the vast majority of EDA tools were proprietary solutions created by the semiconductor companies that used them. And just as chip vendors eventually all but abandoned homegrown tools in favor of commercial offerings, Janac believes that they will ultimately cobble together SoCs from mostly commercial IP with a bit of “secret sauce” thrown in for differentiation.
E-mail This Article | Printer-Friendly Page |
|
Arteris Hot IP
Related News
- Ireland's Duolog flips to an EDA business model
- INTERCHIP achieves 3x faster verification for next-gen clocking oscillator with Siemens' advanced analog and mixed-signal EDA technology
- Synopsys Extends Synopsys.ai EDA Suite with Industry's First Full-Stack Big Data Analytics Solution
- TSMC's 3-nm Push Faces Tool Struggles
- Synopsys and TSMC Collaborate to Jumpstart Designs on TSMC's N2 Process with Optimized EDA Flows
Breaking News
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Leveraging Cryogenics and Photonics for Quantum Computing
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
- Credo at TSMC 2024 North America Technology Symposium
- Cadence Reports First Quarter 2024 Financial Results
Most Popular
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
- Silicon Creations Reaches Milestone of 10 Million Wafers in Production with TSMC
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium
- Alphawave Semi: FY 2023 and 2024 YTD Trading Update and Notice of Results