USB V3.1 Power Delivery Type-C Port Evaluation board for OTI9108 IP
CAST Adds Switched TSN Endpoint Controller to Time-Sensitive Networking Ethernet IP Cores Family
Enables easy implementation of small, low-power, low-latency TSN Ethernet nodes for daisy-chained or ring networks
Woodcliff Lake, NJ, January 17 2020 -- Semiconductor intellectual property (IP) provider CAST, Inc. today announced the availability of a new IP core implementing a switched endpoint controller supporting the Time-Sensitive Networking (TSN) Ethernet standards.
The new TSN-SE TSN Ethernet Switched Endpoint Controller IP core integrates hardware stacks for timing synchronization (IEEE 802.1AS), traffic shaping (IEEE 802.1Qav and IEEE 802.1Qbv), frame-preemption (IEEE 802.1Qbu and IEEE 802.1Qbr), and a low-latency Ethernet MAC.
TSN Ring Network with CAST TSN-SE Switched Endpoint Controller Cores (diagram based on the IEEE TSN Requirements Specification).
The company believes the TSN-SE to be one of the smallest and most energy-efficient such cores available, and it features remarkably low latency, implementing nearly every function in hardware. Furthermore, the endpoint controller portion of the core has been proven in multiple industry plugfests, public demos, and customer applications.
“Industrial and automotive systems designers can now build efficient TSN Ethernet ring networks with all the technical features, reliability, performance, easy reusability, and great customer support CAST IP cores are known for,” said CAST CEO Nikos Zervas.
About the TSN-SE Switched Endpoint Controller Core
Sourced from partner Fraunhofer IPMS, the new core builds on the Fraunhofer/CAST team’s market-leading technical and customer experience helping customers integrate TSN Ethernet and other industrial and automotive interfaces.
The highly-competitive core enables high-precision timing synchronization and flexible yet accurate traffic scheduling. Cut-through switching and minimal buffering—even at the Ethernet MAC level—enable extremely low and deterministic input and output latencies. Standard AMBA® interfaces and other features facilitate easy system integration, simplifying the development of time-aware daisy-chained networks.
The TSN-SE is available now, in synthesizable Verilog source code or as a targeted netlist for Intel, Xilinx, or Lattice FPGA devices. It joins TSN Endpoint and CAN-to-TSN Gateway cores in CAST’s popular Automotive Interfaces family, which also includes IP for CAN 2.0/FD, LIN, and SENT.
Block Diagram for CAST TSN-SE Time-Sensitive Ethernet Switched Endpoint Controller Core
These are part of CAST’s broader IP portfolio, including 32- and 8-bit processors; hardware compression/decompression engines for data, images, and video; and numerous other interfaces and peripherals.
Learn more about CAST’s complete line of IP by visiting www.cast-inc.com, emailing info@cast-inc.com, or calling +1 202.891.8300.
|
CAST, Inc. Hot IP
Related News
- GbE (10/100/1000Base-T) PHY IP Cores with matching 1G Ethernet MAC, PCS and TSN MAC Controller IP Cores for all your high-speed Ethernet Networking applications is available for immediate licensing
- CAST And Avery Design Systems Expand IP Partnership to Support Next Generation High-Bandwidth Automotive Networking And Control Systems
- CAST Adds Ethernet MAC, 64-Bit PCI, and CAN Controller to Line of General Purpose IP Cores
- CAST Adds I3C Secondary Controller Core to MIPI IP Product Line
- New Cadence High-Speed Ethernet Controller IP Family Enables Silicon-Proven Ethernet Subsystem Solutions up to 800Gbps
Breaking News
- Omni Design Technologies Joins Intel Foundry Accelerator IP Alliance
- Efabless Announces the Release of the OpenLane 2 Development Platform, Transforming Custom Silicon Design Flows
- TSMC Reports First Quarter EPS of NT$8.70
- Brisbane Silicon publishes DPTx 1.4 IP Core
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
Most Popular
- U.S. Subsidy for TSMC Has AI Chips, Tech Leadership in Sight
- Cadence Unveils Palladium Z3 and Protium X3 Systems to Usher in a New Era of Accelerated Verification, Software Development and Digital Twins
- Zhuhai Chuangfeixin: OTP IP Based on 90nm CMOS Image Sensor Process Technology Successfully Mass Production
- Silvaco Announces Expanded Partnership with Micron Technology
- OPENEDGES Unveils ENLIGHT Pro: A High-Performance NPU IP Quadrupling its Previous Generation's Performance
E-mail This Article | Printer-Friendly Page |