Camera SLVS-EC v.2.0 5.0Gbps / MIPI D-PHY v2-1 4.5Gbps combo Receiver 4-Lane
New Qualified 12-bit Linear Half Duplex Voice Codec from Chipidea Microelectronics SA
Update: MIPS Technologies Acquires Chipidea (August 27, 2007)
conversion, channel filtering, microphone and speaker interfacing. It was designed in 0.18um CMOS and retargetable towards any sub - micron CMOS technology with 2.5V/3V/5V supply.This cell is very compact (0.42mm2 active area) and very low power (0.9mA typical consumption) by sharing most blocks between ADC and DAC channels. Still, the dynamic performance is high enough for most voice record/playback systems (over 70dB Dynamic Range and over 75dB THD).
The channel filters are implemented digitally, embedded in the decimation and interpolation filters associated with the converters. The receive channel volume control has a range from 0 to 42dB with 6 dB steps. The differential speaker amplifier can drive an external load of 8 Ohm with 70mW (equivalent to LM4882). The microphone amplifier has a sensitivity range from 530mVrms to 4.2 mVrms. The data port is 12 bits parallel at 8kHz word sample rate. A power-down mode is included with less than 1uA of standby current.
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