RF Engines to launch dynamically re-configurable radio spectrum channeliser at the ISPC in 2003
TunEable PFT wins one of best new products at show award
March 31, 2003 - RF Engines Limited (RFEL), the UK based signal processing specialist, will formally release at the International Signal Processing Conference to be held in Dallas, TX, a radical new patented filter bank design, called Tuneable Pipelined Frequency Transform™ (TPFT) to add to its existing range of high performance real-time signal processing architectures. This was selected as one of the six Best New Products at the show by the organisers.
The TPFT product is unique, insofar as it will allow the user to dynamically select sections of spectrum (channels) of differing bandwidths, from a broad band of spectrum, and to acquire and process these channels in real time. The design will disregard the processing of those sections of spectrum that are not of interest, so improving the silicon efficiency even further.
Furthermore, (and a key innovation of the TPFT product), the design will also give users the freedom to tailor the design to their requirements, and will allow them to specify channels by centre frequency and bandwidth, to fully define the filter characteristics, and to then reconfigure in real-time to a different frequency plan or plans, as required. This dynamic channel re-configuration will also be achieved without ‘dropping' any channels that are not affected by the re-configuration i.e. the design now incorporates a constant channel capability. Furthermore, spectral shaping masks can also be directly applied onto the outputs within the architecture itself, so allowing even the final filter shapes to be finely tuned to the needs of the application.
The TPFT architecture has been developed by building upon RFEL's own Pipelined Frequency Transform™ design, and is aimed at all applications that require flexibility in frequency channelisation, but also real-time reconfiguration to different frequency plans.
The TPFT is therefore targeted at a range of Software Defined Radio (SDR) applications where reconfigurable front ends are required, from wideband multi-standard receivers e.g. satellite earth station receivers, base station receivers, reconfigurable radio systems (including Software Defined Radios) through to instrumentation. It is aimed at those applications requiring the channelisation of wideband signals (~150MHz) into different size frequency bins, arbitrarily distributed across the input spectrum.
The underlying concept of this architecture is that of successive band splitting in a pipelined manner: at each stage, the input spectrum is split in multiple channels. A first stage splits the input in two frequency bands, a second stage into four, and so on. Tuneability will be achieved by controlling the channelisation process from outside the TPFT itself, thus allowing reconfiguration on demand. A PC Windows based Graphical User Interface (GUI) controls the architecture, modifying the required parameters as required, although the development of a self-contained SoC architecture is also under consideration.
The TPFT has been developed as an alternative to standard Digital Down Converters (DDC) techniques and will offer significant advantages in terms of silicon utilisation. The architecture is highly pipelined, thus it is best suited to target devices such as FPGA or ASIC. The latest generation of the FPGA devices from the likes of Xilinx, Altera, etc. allows very complex DSP architectures such as the TPFT, to be implemented on single mid-range FPGAs. Furthermore, with the introduction of System on Chip (SoC) capable devices (e.g. Xilinx Virtex-II PRO), the whole system, i.e. filter bank and controls, can be implemented on a stand-alone platform.
A typical TPFT implementation would consists of 10 pipelined stages, providing in excess of 800 usable frequency channels at the finest frequency resolution (in this case a 1024th of the input bandwidth) or fewer channels if wider frequency bins are also required.
The TPFT will be capable of being customised to accommodate for customers needs, leading to optimal tailored solutions: a TPFT design could perhaps compromise on tuneability where a frequency plan is fixed, leading to an even more compact implementation.
For the real-time processing of uneven channels and for on-the-fly reconfiguration, the TPFT architecture will provide significant advantages over more conventional methods of frequency splitting, such as complex down converters, or even less flexible frequency transforms such as the Discrete Fourier Transform (DFT), etc.
Overall, the TPFT fills the gap between the comparatively inflexible FFT or PFT approaches and the use of DDCs, which is an extremely flexible approach, but becomes increasingly inefficient above a certain number of channels. The TPFT provides a highly flexible and efficient means of frequency channelisation, which is fully re-configurable within its hardware frame.
A software model of the TPFT will also be available for system engineers.
RF Engines Limited (RFEL) is a UK based designer, providing high specification signal processing cores, system on chip designs, and FPGA based board solutions for applications in the defence, communications and instrumentation markets. These applications include base stations, wireless and wireline broadband communications systems, satellite communications systems, test and measurement instrumentation, as well as defence systems. More specifically, RFEL is a solutions provider for projects requiring complex front end, real time, wide and narrow band, flexible channelisation. RFEL provides a range of standard cores covering multiple FFT and unique PFT techniques, as well as system design services for specialist applications. Further information can be found at www.rfel.com