400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
Consortium brings 'Spirit' to IP integration
Consortium brings 'Spirit' to IP integration
By Michael Santarini, EE Times
June 3, 2003 (9:19 p.m. EST)
URL: http://www.eetimes.com/story/OEG20030603S0022
ANAHEIM, Calif. A new silicon intellectual property (IP) consortium, called Spirit (Structure for Packaging, Integrating, and Re-using IP within Tool flows), was launched Monday (June 2) at the Design Automation Conference (DAC) here. The consortium aims to ensure IP metadata can be easily transferred between IP vendors, EDA companies, semiconductor and systems companies.
Related News
- Mentor Graphics Platform Express is the First Platform-Based Design Solution to Support The SPIRIT Consortium's New Specification
- 'Spirit' consortium claims progress on IP tool
- Synopsys' coreAssembler Reduces Time and IP Integration Risk for Spirit-Compliant IP
- Spirit consortium releases IP integration standard
- Secure-IC announces the integration of Securyzr™ technology in MediaTek's new flagship smartphone chip, Dimensity 9300
Breaking News
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- SEMIFIVE Starts Mass Production of its 14nm AI Inference SoC Platform based Product
- VeriSilicon's complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
- TASKING and Andes Announce FuSa Compliant Compiler Support for Andes RISC-V ASIL Compliant Automotive IP
- Efabless Launches an "AI Wake Up Call" Open-Source Silicon Design Challenge
Most Popular
- Qualitas Semiconductor and Ambarella Sign Licensing Agreement
- ZeroPoint Technologies Signs Global Customer to Bring Hardware-Accelerated Compression to Hyperscale Data Centers
- Chiplet Interconnect Pioneer Eliyan Closes $60 Million Series B Funding Round, Co-led by Samsung Catalyst Fund and Tiger Global Management to Address Most Pressing Challenge in Development of Generative AI Chips
- Intel and Arm Team Up to Power Startups
- Alphawave Semi and InnoLight Collaborate to Demonstrate Low Latency Linear Pluggable Optics with PCIe 6.0® Subsystem Solution for High-Performance AI Infrastructure at OFC 2024
E-mail This Article | Printer-Friendly Page |