Rambus Outlines Roadmap to Bring XDR to Main Memory
Differential signaling and Dynamic Point-to-Point technology bring unprecedented levels of bandwidth to PCs
MICROPROCESSOR FORUM, SAN JOSE,CA - October 13, 2003 - Rambus Inc. (Nasdaq:RMBS), a leading developer of chip-to-chip interface products and services, announced its roadmap to bring XDR DRAM to the PC main memory market by 2006.
As CPU speeds increase, and as new operating systems and software applications come to market, PC main memory requirements will quickly outgrow the limits of current mainstream memory solutions. Running at 3.2GHz, XDR DRAM offers eight times the bandwidth of today''s best-in-class PC memory. The differential signaling of XDR allows it to scale to 6.4GHz and beyond, providing PCs with unprecedented levels of memory performance.
"Today's PC main memory systems are performance limited due to their use of single-ended signals and multi-drop data busses," said Laura Stark, vice president of the Memory Interface Division at Rambus. "Differential signaling and Rambus's novel Dynamic Point-to-Point module upgrade technology allow users to maximize capacity in their memory systems without compromising performance."
Rambus has defined all of the ingredients necessary to bring XDR to PC main memory. These ingredients include a broad range of XDIMM memory modules, programmable-width XDR DRAMs, buffers, connectors, clock generators, and comprehensive system design guidelines and documentation.
The XDIMM memory module will provide 12.8GB/s to 25.6GB/s of bandwidth, which is four times more memory module bandwidth in the same pin count and form factor as DDR2 DIMMs, giving the XDIMM the highest performance at the lowest system cost.
XDR memory's novel system topology allows point-to-point differential data interconnects to scale to multi-gigahertz speeds, while the bussed address and command signals allow a scalable range of memory system capacity supporting from one to 36 DRAM devices. XDR offers a roadmap to 6.4GHz and can scale to interface widths of up to 128-bits, enabling memory system bandwidths up to 100GB/s, 16 times more than today?s 6.4GB/s memory systems. XDR DRAMs will be available in multiple speed bins, device densities, and device widths. With densities ranging from 256Mb to 8Gb, and device widths ranging from x1 to x32, XDR DRAM satisfies the needs of both high-bandwidth and high-capacity systems.
Samsung, Elpida, and Toshiba are all DRAM licensees of Rambus's latest memory interface technology.
Rambus will be exhibiting XDR signaling at the Microprocessor Forum at the Fairmont Hotel in San Jose, California, Ocotober 13 - 16, 2003. Additional information on XDR DRAM memory can be found at www.rambus.com/products/xdr/
About Rambus Inc.
Rambus is one of the world's leading providers of chip-to-chip interface products and services. The company's breakthrough technology and engineering expertise have helped leading chip and system companies to solve their challenging I/O problems and bring industry-leading products to market. Rambus's interface solutions can be found in numerous computing, consumer electronic and networking products. Additional information is available at www.rambus.com.
Rambus is a registered trademark and RDRAM is a trademark of Rambus Inc. Other trademarks that may be mentioned in this release are the intellectual property of their respective owners.
|
Related News
- Rambus Unveils New Innovations for Main Memory
- Rambus to Demonstrate the World's Fastest Memory Device at Intel Developer Forum; New XDR DRAMs from Toshiba and Samsung Provide 8x the Bandwidth of Today's Main Memory
- Rambus and Mobiveil Partner to Bring Pre-Validated Solution to Chip Makers, Delivering Memory Flexibility and Accelerated Time-to-Market
- Rambus Unveils Mobile XDR Memory for Next-Generation Mobile Products
- Rambus Demonstrates Superior Power Efficiency of World's Fastest Memory
Breaking News
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- SEMIFIVE Starts Mass Production of its 14nm AI Inference SoC Platform based Product
- VeriSilicon's complete Bluetooth Low Energy IP solution is fully compliant with LE Audio specification
- TASKING and Andes Announce FuSa Compliant Compiler Support for Andes RISC-V ASIL Compliant Automotive IP
- Efabless Launches an "AI Wake Up Call" Open-Source Silicon Design Challenge
Most Popular
- Intel and Arm Team Up to Power Startups
- Chiplet Interconnect Pioneer Eliyan Closes $60 Million Series B Funding Round, Co-led by Samsung Catalyst Fund and Tiger Global Management to Address Most Pressing Challenge in Development of Generative AI Chips
- PUFsecurity Unveils Next-Gen Crypto Coprocessor PUFcc7 Featuring High-speed Performance and TLS 1.3 Support
- Renesas Introduces Industry's First General-Purpose 32-bit RISC-V MCUs with Internally Developed CPU Core
- SmartSoC Solutions Joins TSMC Design Center Alliance to Boost Semiconductor Innovation in India
E-mail This Article | Printer-Friendly Page |