English
32-Bit RISC-V Embedded Processor and Subsystem, Maps ARM M-0 to M-4. Optimal PPA,
Legend and Circuit Semantics Invite EDA Community to Demos at DATE That Show How to Improve Timing and Characterization of SoC Designs
Who
Circuit Semantics, Inc. (CSI), the leading provider of modeling and characterization software for high-performance integrated circuit (IC) design and Legend Design Technology, Inc., a leading supplier of EDA software for circuit simulation and memory IP (Intellectual Property) characterization, invite attendees at the Design Automation and Test in Europe (DATE) Conference to learn how to improve their ASIC, DSP, microprocessor and high-speed communications designs.
What
Demonstrations feature Legend's MSIM® circuit simulator used with Circuit Semantics DynaCell(TM) and DynaCore(TM) circuit characterization software.
Where
Legend Design Technology Stand # 9325
CNIT, La Defense, Paris, France
When
Tuesday, February 17, 1000-1900
Wednesday, February 18, 1000-1800
Thursday, February 19, 1000-1700
Information and Registration
For more information about Circuit Semantics, please visit the Circuit Semantics website at www.cicuitsemantics.com. To make an appointment at DATE, please contact Endric Schubert - +49 (0) 160 95 100 689
For more information about DATE, please visit www.date-conference.com.
About Circuit Semantics
Circuit Semantics, Inc. provides electronic design automation (EDA) software that supports precise, gate-level abstraction and analysis of transistor-level circuits, and accelerates timing closure for designs fabricated in nanometer process technologies. Circuit Semantics is headquartered at 2410 Charleston Road, Mountain View, California 94043, telephone 650-564-9100. For more information, visit www.circuitsemantics.com.
About Legend Design Technology
Legend Design Technology, Inc. is a leading provider of characterization and simulation software for semiconductor Intellectual Property (IP) in SoC designs. With an emphasis on productivity and value, the company's software revolutionizes the time consuming and error prone processes associated with characterization. Legend Design Technology is headquartered at 2880 Lakeside Drive, Suite 101, Santa Clara, California 95054, telephone 408-748-8888. For more information, visit www.LegendDesign.com.
###
|
||||||
Related News
- Synopsys' PrimeTime Speeds Timing and Power Closure for Complex SoC and IoT Designs
- New AXI4 VIP Suite to improve FPGA and SoC reliability for ARM-based designs
- Legend's MSIM SPICE Circuit Simulator Certified for TSMC's Advanced Nanometer Circuit Designs
- Legend releases Turbo-MSIM Fast-SPICE Simulator for Verification, Analysis and Characterization in SoC Design
- Dongbu HiTek adopts Legend Design Technology's Memory Characterization Tools for Quality Timing and Power Models
Breaking News
- Keysight, Synopsys, and Ansys Deliver Radio Frequency Design Migration Flow to TSMC's N6RF+ Process Node
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Leveraging Cryogenics and Photonics for Quantum Computing
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
- Credo at TSMC 2024 North America Technology Symposium
Most Popular
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
- Silicon Creations Reaches Milestone of 10 Million Wafers in Production with TSMC
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium
- Alphawave Semi: FY 2023 and 2024 YTD Trading Update and Notice of Results
|
E-mail This Article | 
|
|
Printer-Friendly Page |