Open-source cores to aid in system design

SANTA CRUZ, Calif. — If the best things in life are free, design services firm OpenSoCDesign has a distinct advantage. This Spanish startup is focusing on system development using open-source cores, and is helping create an infrastructure to make such cores more usable.

Based in Madrid, Spain, OpenSoCDesign was launched earlier this year by four R&D professionals from universities and private companies, said chief scientist Javier Castillo. The company offers system design, intellectual-property (IP) design and open-source hardware integration services. It has also created three open-source cores of its own, and two commercial cores. The open-source cores are available at the Opencores.org Web site.

Castillo said the company has thus far been working with Spanish and French firms, integrating OpenRISC processors with other open-source and custom IP blocks. The OpenRISC 1000 family of CPUs is well-known among open-source IP users. The OpenRISC 1200 is a 32-bit scalar RISC core comprising about 600,000 transistors. The OpenRISC cores are also available at Opencores.org.

Aside from the fact that the cores are free, "The main advantages of using open-source cores are full access to the code and the quality, when developed and supported by reputable individuals and companies," Castillo said. "The main challenges are the lack of standards for development and verification, and the lack of open-source CAD tools."

Two of the open-source cores developed by OpenSoCDesign implement the DES cryptographic algorithm, and are available in SystemC and Verilog. The third is a 32-bit random-number generator. Commercial cores include a low-area implementation of the AES cryptographic algorithm and an MDS hash algorithm.

"The open-source cores that we include in Opencores can be seen as a service to clients," said Castillo. "At the same time, it acts as a showcase for our work and creates more work for the company in terms of IP designs and system integration."

Meanwhile, OpenSoCDesign is developing a SystemC-to-Verilog synthesizable subset translator. It will be available from the company's Web site under the GNU public license within days, Castillo said.

Jordan Selburn, principal analyst at iSuppli Corp., said that OpenSoCDesign may be on to something. "If an open-source core has a feasible economic model and support is available, there's no reason why it shouldn't succeed. But whether there is a viable business model remains to be seen. Maybe this sort of infrastructure is required for open-source cores to work," Selburn said.