ARC announces availability of Tangent-A4 with the ARCform platform for SoC development

Nurnberg, Germany, 14th February 2001- ARC Cores (LSE: ARK), a pioneer in configurable and extensible processors, today announced immediate availability of Tangent-A4, its latest soft microprocessor core that was previewed at the Microprocessor Forum in San Jose, California, in October 2000. Tangent-A4 is the key enabler in the company?s new ARCform platform for enhanced system on chip (SoC) design.

?Until now, SoC development has been heavy on hindsight - you only learn about the challenges of integrating mutually-incompatible IP (intellectual property) blocks after you have missed your product release window,? said Wasim Ahmed, Product Manager, Processor Platforms at ARC Cores. ?ARCform enables developers to reduce time-to-market by providing verified hardware and software IP blocks that work together - significant because this is a part of the development process which can take up to 50 per cent of the product design time, if the IP blocks are not designed to work together.?

He adds, ?Tangent-A4, sitting at the heart of ARCform, delivers high RISC/DSP performance because the configurable and extensible nature of the architecture performs more useful processing per clock cycle. The amount of work that a processor can do per clock cycle is a much more meaningful measure of performance than the speed at which the processor runs. The result of running at a lower speed to do the same amount of work as, say, an alternative processor, is that it can also lead to substantial reductions in power consumption.?

Norbert Schuhmann, manager, design services group of the Fraunhofer Institute's Integrated Circuits (IIS) Digital IC Design department (www.iis.fhg.de), which is also an ARC Certified Design Centre, said, "We have already installed the ARC Tangent-A4, are running the MetaWare software and are implementing AAC audio coding technology on ARC's processor. Tangent-A4 provides positive advantages for SOC audio processing together with data stream handling and user interfaces, particularly as it combines RISC and DSP capability in a single processor core." Fraunhofer IIS is one of Europe's leading independent design facilities, focusing on ASIC design services for digital and mixed signal ICs for a variety of applications and for different technologies offered by commercial semiconductor companies.

In a 0.18µm process, under worst case conditions, the Tangent-A4 delivers in excess of 230 Dhrystone MIPS and 362 Million Multiply-Accumulates per Second (dual 16 x 16 MAC).

The Tangent-A4 core, one of the smallest 32-bit cores on the market(under 10k gates for the base case processor), also features a configurable interrupt system and a data memory pipeline to facilitate the integration of slave peripherals.

An expanded peripheral portfolio, including an Ethernet MAC, UARTs & timers are integrated and verified as part of ARCform, and include full software support.

The new ARCform platform contains a suite of powerful development tools to help the designer reduce time-to-market. The ARChitect point-and-click configuration tool can create a customised Tangent-A4 processor in a matter of moments. The tool suite includes a configurable compiler, a debugger that can support coordinated debug of multiprocessor systems and profiling tools. A new cycle-accurate simulator has been introduced, enabling designers to work with HDL simulation accuracy but at far greater execution speeds.

A new signal visualisation tool has been developed that plugs into the MetaWare SeeCodeTM debugger, allowing data to be displayed in various graphical forms - for example 2D, 3D, time, frequency, etc. Peripheral displays are also available with the debugger - for example, showing the contents of various Ethernet registers.

ARCform supports accelerated SoC development, and differentiation of new products, through extensive integration of verified hardware and software IP and related tools. The platform allows developers to integrate, protect and exploit their own IP, and also to access IP from ARC subsidiary companies, development partners, and other third parties. The ARCform system solution is completed by RTOS support including Precise MQX, ATI Nucleus, Express Logic ThreadX and Wind River VxWorks®. The system software is completed with an MP3 decoder, vocoders, DSP library, TCP/IP and HTTP stacks and device drivers.
About the Fraunhofer Institute
The Fraunhofer Institute for Integrated Circuits, Applied Electronics IIS-A, develops microelectronic circuits, devices, and systems up to complete industrial solutions. Fields of applications are information and communications technology, imaging sensor technology, image processing, X-ray and medical technology. The IC design engineers develop a broad spectrum of digital and analog ICs including standard ICs as well as Application Specific ICs (ASICs). Well maintained links to international silicon foundries provide for IC prototypes and production scale volumes. Fifteen years of experience in IC design, board and system level design and very skilled experts for all steps from specification to layout and test are an excellent prerequisite for project work. For further information refer to http://www.iis.fhg.de/asic/

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