32-Bit RISC-V Embedded Processor and Subsystem, Maps ARM M-0 to M-4. Optimal PPA,
IBM, Sony, Toshiba tip 'Cell' processor at 90-nm
EE Times: Latest News IBM, Sony, Toshiba tip 'Cell' processor at 90-nm | |
Mark LaPedus (02/07/2005 2:02 PM EST) URL: http://www.eetimes.com/showArticle.jhtml?articleID=59301581 | |
SAN FRANCISCO — At the International Solid State Circuits Conference (ISSCC) on Monday (Feb. 7), IBM Corp., Sony Corp., Sony Computer Entertainment Inc., and Toshiba Corp. disclosed more details of the long-awaited "Cell" processor. A team of IBM, Sony, and Toshiba have collaborated on the development of the "Cell" microprocessor at a joint design center established in Austin, Texas, since March 2001. The device is aimed for entertainment and media applications — at speeds up to 10 times the performance of the latest PC processors. Built around IBM's Power RISC-based processor technology, the "Cell" features a multicore architecture that provides clock speeds greater than 4-GHz. The prototype "Cell" chip is 221-mm2 device. It integrates 234 million transistors and is fabricated with 90-nanometer silicon-on-insulator (SOI) and low-k dielectrics technologies. A key to the architecture is the so-called Synergistic Processor Element (SPE), which is a SIMD-based technology. "The SPE can issue up to two instructions per cycle to seven execution units organized in two execution pipelines," according to a paper presented by the developers of "Cell." It is said to support multiple operating systems, such as Linux, real-time operating systems and guest operating systems for specific applications simultaneously. Initial production of "Cell" microprocessors is expected to begin at IBM's 300-mm wafer fabrication facility in East Fishkill, N.Y., followed by Sony's Nagasaki Fab, this year.
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