LSI Logic Introduces RapidChip Xtreme2(TM) Family With Unprecedented SERDES Integration and I/O Bandwidth
- RapidChip Xtreme2 family leads industry in Platform ASIC SERDES integration with 12 new slices and up to 48 channels operating at 4.25Gb/s
- Advanced capabilities previously only achievable in a cell-based ASIC can now be realized quickly and affordably
- LSI Logic's extensive experience in high-speed I/O diffused into pre-built, pre-verified slices serves as a foundation for customer innovation
MILPITAS, Calif., March 14 /PRNewswire-FirstCall/ -- LSI Logic Corporation (NYSE: LSI) today introduced the RapidChip Xtreme2(TM) family of Platform ASICs, which builds upon the company's leadership in the RapidChip(R) technology performance and integration capability. The RapidChip Xtreme2 family currently consists of 12 slices and provides the necessary resources for developers to tackle the most demanding high-speed serial applications in the computing, communications, storage, and embedded systems marketplace.
Integrated resources include up to 48 SERDES, up to five million gates and 3.7 Mbits of RAM, a flexible MatrixRAM internal memory architecture and support for popular external high-bandwidth memory interfaces such as DDR2 and QDR. Performance and capabilities previously achievable only in a cell-based ASIC can now be realized quickly and affordably with the RapidChip Xtreme2 Platform ASIC family.
"The RapidChip Xtreme2 family incorporates the resources needed to build the sophisticated serial I/O fabrics at the heart of modern IT infrastructure," said Jerry Worchel, principal analyst, ASIC/ASSP for In-Stat. "Just as important, by making these resources available in a Platform ASIC, LSI Logic's customers can innovate and at the same time effectively manage cost, risk, and time-to-market."
Unprecedented High-Speed SERDES Integration
Building on LSI Logic's high-speed serial I/O leadership, the RapidChip Xtreme2 family integrates up to 48 GigaBlaze(R) and Hydra(TM) SERDES in various combinations that satisfy a broad range of applications across multiple markets. With data rates up to 4.25 Gigabits/sec, supported standards include, but are not limited to, Gigabit Ethernet, 10 Gigabit Ethernet (XAUI), PCI Express (including ASI), Fibre Channel, InfiniBand, CX4, Serial Rapid IO, SGMII, SPI4.2, SPI5, SAS, SATA, and HyperTransport standards.
"With its flexible architecture and support for full-speed HyperTransport(TM) technology, LSI Logic's RapidChip Xtreme2 family is an ideal complement to the AMD Opteron(TM) processor," said David Rich, director of 64-bit Embedded Markets at AMD. "The combination of the AMD Opteron(TM) processor with Direct Connect Architecture and LSI Logic's RapidChip technology provides embedded designers with lower development costs and quicker time to market for their high-performance, highly-integrated solutions."
Innovative MatrixRAM Memory Block Architecture
The MatrixRAM architecture consists of one or more densely-packed arrays of memory "instances." Instances are pre-diffused memory building blocks that can be used individually or can be flexibly combined to form larger memories. These larger memories can be configured to a wide range of widths and depths to fit whatever an application requires. Because instances are densely packed and pre-diffused, routing overhead is low and the resulting memories are extremely fast. MatrixRAM memory enables system designers to meet many diverse requirements while giving up little in the way of performance or density as compared to a standard cell ASIC.
Configurable I/O Enables State-of-the-Art Memory and High-Speed Parallel Interfaces
In addition to high-speed serial interfaces supported by integrated SERDES, the "Configurable I/O" portion of the RapidChip Xtreme2 family of slices can support a wide variety of high-performance, low-latency parallel interfaces. Supported memory standards include DDR2, which is emerging as the dominant memory technology in enterprise computing; RLDRAM2 and FCRAM2 common in high performance networking and QDR common in storage networking. Very fast LVDS buses like SPI-4.2 can be implemented in Configurable I/O as well. By nature high-speed parallel interfaces are extremely timing sensitive, and the RapidChip Xtreme2 family embodies LSI Logic's industry-leading signal integrity expertise with features such as on-die termination, slew rate control, and source impedance control.
"By leveraging our extensive experience in high speed I/O and our proven SERDES technology, we're enabling our customers to design robust enterprise and communications infrastructure solutions with an easy-to-use design flow that reduces effort and risk," said Thomas Colino, director, RapidChip Platform Architecture, LSI Logic Corporation. "Customers also have at their disposal an extensive portfolio of proven intellectual property with cores and tools from LSI Logic, and from third-parties via the RapidChip(R) Platform ASIC Partner Program."
About LSI Logic Corporation
LSI Logic Corporation focuses on the design and production of high-performance semiconductors for Consumer, Communications and Storage applications that access, interconnect and store data, voice and video. LSI Logic engineers incorporate reusable, industry-standard intellectual property building blocks that serve as the heart of leading-edge systems. LSI Logic serves its global OEM, channel and distribution customers with Platform ASICs, standard-cell ASICs, standard products, host bus adapters, RAID controllers and software. In addition, the company supplies storage network solutions for the enterprise. LSI Logic is headquartered at 1621 Barber Lane, Milpitas, CA 95035. http://www.lsilogic.com . Notes to Editor:
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"Safe Harbor" Statement under the Private Securities Litigation Reform Act of 1995: Statements in this press release regarding LSI Logic's business which are not historical facts are "forward-looking statements" that involve risks and uncertainties. For a discussion of such risks and uncertainties, which could cause actual results to differ from those contained in the forward-looking statements, see "Risk Factors" in the Company's Annual Report or Form 10-K for the most recently ended fiscal year.
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