TSMC exec calls for proactive measures on IP
EE Times: TSMC exec calls for proactive measures on IP | |
Ron Wilson (03/23/2005 4:49 PM EST) URL: http://www.eetimes.com/showArticle.jhtml?articleID=159904993 | |
SAN JOSE, Calif. A Taiwan Semiconductor Manufacturing Co. Ltd. executive described a blueprint for how intellectual property vendors should deal with the fabless semiconductor industry in an address to the International Symposium on Quality Electronic Design here Wednesday (March 23). Kenneth Weng, TSMC's deputy director of library and IP quality management, said "assuring IP quality is not rocket science. But it's not being done, either." To correct the omission, Weng said IP quality must be managed. "Foundries must play a key, proactive role in IP quality management." Tracing IP quality problems, which Weng suggested were endemic in the industry, back to the disaggregation of IDMs, the executive proposed a series of foundry-centric steps that would re-establish the working links between IP developers and users and process engineers that could ensure a quality result for IP-heavy SoCs. First, he said, it was necessary for foundries to pare down the number of IP vendors they would work. "We must work closely with IP providers, and this means working only with a select number of them," he said. Weng said TSMC teams visit IP vendors and audit their verification methodologies to get some idea of design robustness. Weng said it is also necessary for foundries to clearly define the expectations of all three parties vendors, users and foundries so that misunderstandings about requirements, capabilities or validation levels don't result in defective wafers. Weng also called for foundries to work with IP providers to thoroughly evaluate each IP product. Finally, he said foundries must optimize their return on this investment in IP quality. As a recommendation to SoC design teams embarking on the hunter-gatherer mission to find the right IP, Weng suggested several key steps. First, put together a shopping list of IP functions needed for the design. Second, search your foundry Web site for specific IP blocks the foundry has validated. Third, independently verify the quality of candidate IP for your particular flow and application. Finally, Weng said, the design team should verify that the IP can in fact be integrated with other blocks in an SoC design. He warned that not all functionally correct blocks actually work together.
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