Arm China selects Mentor's Questa Verification Solution to enhance power efficiency and speed development of MCU designs
Apr 18, 2019 -- Continuing to expand its functional verification footprint across high-growth markets and applications, Mentor, a Siemens business, today announced that Arm China has selected Mentor’s Questa™ Simulation with Power Aware verification solution to handle critical tasks in the development of next-generation, low-power microcontroller (MCU) cores.
Arm China selected the Mentor Questa solution after a thorough evaluation, during which Questa demonstrated smooth bring-up and delivered a 100 percent pass rate against all target designs.
“Mentor has been an Arm partner for years, and we are pleased to extend this collaboration to our design teams at Arm China,” said William Liu, vice president of Product Development, Arm China. “We are satisfied with the compatibility and performance of Questa in complex verification environments, and we look forward to leveraging Questa solutions to develop highly successful designs for a range of fast-growing markets.”
Engineered to reduce risks associated with validating complex FPGA and SoC designs, the Questa Advanced Simulator works together with Mentor’s Questa® Power Aware Simulation solution, helping customers to implement low power silicon designs by accurately modeling low power silicon behavior early in the design cycle. With Questa Power Aware Simulator, Arm China’s design teams can verify active power management functionality at the register-transfer level (RTL) stage, enabling the exploration of alternative approaches before implementation begins, to achieve the greatest power reduction at the least cost.
“Mentor’s Questa verification tools have established a long track record of helping the world’s foremost chip designers unleash innovation and get to market faster and with greater confidence,” said Ravi Subramanian, general manager and vice president of Mentor’s IC Verification Solutions. “Mentor is honored to add Arm China to our long and growing list of industry leaders who rely on Questa verification solutions to differentiate and win in highly competitive markets.”
About Mentor Graphics
Mentor Graphics Corporation, a Siemens business, is a world leader in electronic hardware and software design solutions, providing products, consulting services, and award-winning support for the world’s most successful electronic, semiconductor, and systems companies. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. Web site: http://www.mentor.com.
|
Related News
- Mentor's Questa and Veloce platforms help SimpleMachines dramatically speed development of its first AI processor
- Mentor Graphics Questa and Veloce Verification Platforms Add Cache Coherency and Interconnect Performance for ARM AMBA 5 CHI and AMBA 4 ACE Designs
- Mentor Graphics Integrates its Questa Verification Solution with Jenkins Ecosystem Enabling Maximum Regression Speed
- Imagination and Mentor Graphics collaborate to speed verification of MIPS-based designs with Veloce and Codelink
- Synopsys' Verification IP for DDR4 3DS Enables DRAM Designs with Higher Density and Performance at Reduced Power
Breaking News
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
- Controversial former Arm China CEO founds RISC-V chip startup
- Fundamental Inventions Enable the Best PPA and Most Portable eFPGA/DSP/SDR/AI IP for Adaptable SoCs
- Cadence and TSMC Collaborate on Wide-Ranging Innovations to Transform System and Semiconductor Design
- Numem at the Design & Reuse IP SoC Silicon Valley 2024
Most Popular
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Qualitas Semiconductor Appoints HSRP as its Distributor for the China Markets
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
E-mail This Article | Printer-Friendly Page |