The 28nm lvcmos18 is a 1.8V LVCMOS bi-directional digital pad. It has an operating frequency of 200 MHz (400Mbps). Programmable pull-up, pull-down, drive strength and Schmitt trigger are some of the salient features for the cell. It has foot print of 35μm x 130μm.
- Supports 9-layer (702) metallization with Circuit-Under-Pad (CUP).
- Layout supports flip chip only
- Core supply is 0.9 V (0.81V to 1.05V)
- I/O supply is 1.8 V (+/- 10%).
- Operates over temperature range of -40oC to 125oC
- Power supply sequence independent
- ESD hardness of 2KV HBM, 500V CDM and +/-100mA current injection for latch up
- All Outputs(PAD) are tri-stated when core voltage is low and core signals(CIN) will drive low, when IO voltage is not available.
- All signal cells have a programmable pull-up or pull-down of >10K-Ohms and Schmitt Trigger
- 3mA, 7mA, 15mA and 18mA programmable drive strength
- This I/O is not 2.5 V or 3.3V tolerant in 1.8 V operation
- Services Available with this Product
- SOC Integration
- Application & ESD Guidance
- Signal Integrity Analysis & Guidelines
- Characterization Support
- LEF file
- LVS netlist
- Verilog Model
- Timing Model