The IP is low-power 10BASE-T/100BASE-TX Ethernet physical layer (PHY) transceiver with variable I/O voltage that is fully compliant with the IEEE 802.3 and 802.3u standards.
The IP is designed and optimized in TSMC's 28nm node.
It can be configured to interface with a controller through MII/RMII/SMII interfaces. The PHY is ideal for use in set-top boxes, gaming consoles, instrumentation, DVR's, wireless access points, digital TV's, industrial applications and many more!
- Integrated IEEE 802.3/802.3u compliant 10/100Mbps Ethernet PHY
- Supporting both full and half-duplex for either 10 or 100 Mb/s datarate
- AutoMDIX capable
- 100Base-FX support
- MII/RMII/SMII interface
- Supports auto-negotiation (and next page support)
- Full set of power down modes
- Interface available to 100Base-FX Fiber-PMD
- Serial Management Interface (SMI)
- On-board diagnostics
- Flexible configurations for LED status indicators
- Optimized in 28nm, lowest area and power on the market
- Supporting military temperature range -40C to 125C!
- Perfect mix of analog and digital lends itself to robustness, portability, and performance
- Multiple clock options
- Stand-alone core
- GDSII - compliant with DFM
- LIBERTY files for timing closure
- extensive documentation