The 12-bit ADC is an ultra low-power 12-bit high-speed SAR ADC IP with a sampling frequency ranging from 15MS/s up to 80MS/s.
For maximum application flexibility, the power dissipation of this ADC scales with the sampling rate. This 12-bit ADC features an excellent static performance that includes ±0.5LSB DNL and ±1.0LSB INL.
Considering a sampling rate of 80MS/s, a 10.7MHz input frequency and an input range of 1Vppdiff, this ADC IP features an outstanding dynamic performance that includes for typical conditions 83dB SFDR, -78dB THD, 64dB SNR and 10.3-bit ENOB.
This high-end performance is obtained while dissipating a mere 6.7mW for the full IP including internal references. That corresponds to an ultra efficient 65fJ/sample. Furthermore, the ADC core (excluding internal references) dissipates only 4.1mW. The S3ADS80M12BSM40LL does not require any special analog options, and can be cost-effectively ported across foundries and process nodes upon request.
- SMIC 40nm Low Leakage (LL)
- No Analog Options
- 1.1V Core & 2.5V I/O Supplies
- 12-bit ADC
- Sampling Rate from 15MS/s up to 80MS/s
- Power Consumption Scaling with Frequency
- High-Speed SAR-based Architecture
- Internal Bandgap and Biasing System Included
- All Required Voltage References Included
- Differential Input Signal Range: 1.0Vppdiff
- Outstanding Dynamic Performance at 80MS/s:
- 81dB SFDR at fin=10.7MHz
- -78dB THD at fin=10.7MHz
- 64dB SNR at fin=10.7MHz
- 63.9dB SNDR at fin=10.7MHz
- 10.3-bit ENOB at fin=10.7MHz
- Stand-by and Power Down Modes
- Ultra Low Power Dissipation: Only 6.0mW at 80MS/s Including References
- Ultra Efficient ADC Converter: Only 59fJ/sample FOM Including References
- Ultra Compact Die Area
- Wireless Communications
- Wireline Communications
- Home Network
- General Purpose
Block Diagram of the 12-bit 15-to-80MS/s Ultra-Efficient ADC