The nSAD14150_TS13m_1A is an advanced high-speed and low power 14 bits analog-to-digital converter. It achieves up to 13 ENOB conversion linearity. It is built around a fully differential proprietary enhanced pipeline converter and a digital error correction circuitry. An input buffer is provided for an easier interface to your analog/RF front-end circuitry.
This ADC IP includes an internal reference voltage generator and an internal bias circuitry. The input buffer signal bandwidth (SBW) and the data converter achievable conversion speed are digitally scalable for optimal power consumption. For a better match to your specific needs, other power reduction modes are available upon request.
- TSMC 130nm 1.2V/3.3V CMOS process
- Dual 3.3V/1.2V supply for highest linearity
- 20 to 150 Mspls/s scalable sampling rate
- 1 to 4 Vpp_diff selectable input dynamic range
- Up to 150MHz input buffer signal bandwidth
- DNL = ±0.5 LSB typ., INL = ±1 LSB
- SNR = 80dBFS @ Fin = 10MHz and 150MS/s
- SFDR > 86dBc @ Fin = 10MHz and 150MS/s
- Fully internal reference voltage generator and bias circuitry
- Proprietary architecture enhancements allowing very high conversion efficiency
- less than 1.3 mm2 core area including input buffer, reference generator and biasing
- Power down mode
Block Diagram of the 14-Bit 150MS/s 1.2V/3.3V 250mW ADC, CMOS 130nm