Synopsys offers more than 25,000 design engineers who use the DesignWare Library and the DesignWare Verification Library access to high-performance cores from leading Star IP providers such as IBM, NXP and Altera.
The Design Views of the DesignWare Star IP core, which include simulation and timing models, verification environment and full documentation, are available to all DesignWare Library and DesignWare Verification Library licensees at no additional cost. Requests for the Design Views can be made through the DesignWare Request or by following the links on the individual Star IP web pages below.
For an additional fee, DesignWare Library customers may license the Implementation Views. The Implementation Views include the synthesizable RTL, tool scripts, and verification suite required to implement the design. Implementation Views of the DesignWare Star IP Cores are available from the respective IP owner (and Synopsys, in the case of PowerPC and Nios II).
Synopsys provides design and implementation support for the DesignWare Star IP cores.