The ARM® Artisan® DLL (Delay Locked Loop) is the ideal solution for the 90 degree clock delay needed in many source-synchronous, double-data rate systems. The master DLL cell provides a precise 90 degree phase shifted data strobe (DQS/DQSB) to slave DLLs by continuously measuring the period of the memory controllerâ€™s reference clock and creating an accurate digital code to represent the data shift. This accurate performance is enabled even at low frequencies, allowing low-speed functional testing and reliable data timing down to 10MHz. The robust Artisan DLL is electrically and physically tuned for the TSMC 65nm GP process and uses a 2.5V thick-oxide device for high voltage protection and optimum I/O and core power consumption. The Artisan DLL provides the precision, performance and voltage requirements necessary to implement reliable DDR PHY solutions.
The ARM® Artisan® Deskew Phase Locked Loop (PLL) is a two output, programmable, frequency synthesizer macro cell designed specifically for clock generation. The Deskew PLL ensures accurate frequency optimization and is designed to remove the skew between the output of a clock and the clock reference. This PLL-based frequency synthesizer generates robust signals from 100MHz to 800MHz using an internal loop filter and active bandwidth regulator, providing maximum noise immunity and minimum jitter. Electrically and physically tuned to the TSMC 65nm GP process, the Artisan PLL provides optimum frequency operation and power consumption for precise, dependable implementations.
- Up t 800Mbps (400MHz) DDR2 Performance
- 1.2V Digital supply
- 1.8V or 2.5V Analog supply
- 15ps resolution
- Jitter less than 3% of cycle time for each output
- Option for individual signal adjustment
- Calibration time under 66 clock cycles
- Can be implemented with staggered I/ for optimization
- Ideally suited for precision clock applications
- Input frequency range: 20â€“400MHz
- Output frequency range: 50â€“800MHz
- 1.2V digital supply, 2.5V analog supply
- Programmable feedback divider and test bypass system
- Deskew function included
- N external components or adjustments necessary due t internal loop filter
- Lock detect
- Typical power dissipation: 4mW
- Very low jitter
- Each ARM product is delivered with a full suite of design views and models that support industry leading design tools. Front End (FE) design and complete (FB) tapeout views can be downloaded from the ARM DesignStart website at: http://designstart.arm.com.