The A429 Rx Core implements a receiver as specified in the ARINC Specification 429 Part 1-17.
This “Mark 33 Digital Information Transfer System (DITS)” specification defines how to transfer digital data between avionics systems elements. The transmission is done over a twisted and shielded pair of wires and bi-directional data flow is not permitted. An extra twisted and shielded pair of wires is used when data is required to flow both ways.
- Compliant to ARINC Specification 429-17 (May 17, 2004)
- Design Assurance Level A according to RTCA DO-254/ED-80 (April, 2000)
- Configurable data rate and tolerance
- Multiple error checking (frequency, gap, parity and form)
- Interfaces to standard line receivers
- Simple interface to user's logic
- TMR coded for SEU immunity (optional)
- Technology independent (can be synthesized to any FPGA/CPLD vendor)
- For a fact sheet of this IP Core please go to:
- For Implementation Size and Speed please go to:
- For a VHDL example:
Block Diagram of the DO-254 ARINC 429 Receiver