The CS_AD120160D_GF65LPe is a high-performance, ultra-low-power, dual, 12-bit, 160-MSPS pipeline ADC with built-in reference and clock phase generation. This part is available in either single or dual (IQ) configurations.
- Multistage pipeline with digital error correction.
- Fully differential analog inputs.
- Built-in reference and bias circuitry.
- Excellent dynamic performance
- High analog input bandwidth
- Small area footprint
- Verilog-A model
- WiFi / WLAN / WiMAX
- Wireless Communications
- Cable Set Top Box
- Software Defined Radio
Block Diagram of the Dual 12-bit 160-MSPS ADC