Multi-standard Hardware 4K Video Decoder IP Core

Features

• Supported standards for Decoder
• ISO/IEC 14496-10 AVC(H.264) BP/MP/HP@L4.2
• ISO/IEC 14496-10/5 MVC Stereo High Profile@L4.1
• ISO/IEC 14496-2 MPEG-4 SP,ASP@L6
• SMPTE 421M-2006 VC-1 SP/MP/AP@L3
• ISO/IEC 13818-2 MPEG-2 MP@HL
• ITU-T H.263(Annex I,J,K,T)
• RealVideo v.8/9/10
• AVS Jizhun @L6.2
• On2 VP8
• Sorenson Spark
• Theora
• Supported Resolution
• Up to 4Kx2K(4096x2304) resolution
• Performancce
• Single-stream
• H.264 HD(1920x1080p) 30fps decoding at <133MHz core clock
• H.264 HD(1920x1080p) 60fps decoding at <266MHz core clock
• Multi-stream
• Dual H.264 HD(1920x1080p) 30fps decoding at <266MHz core clock
• 6SD/D1(NTSC&PAL) 30fps decoding at <133MHz core clock
• Decoding Tools
• CABAC/CAVLC for H.264/AVC
• MPEG-4 AC/DC prediction
• H.264/AVC intra-prediction
• In-loop deblocking filter for H.264, H.263, RV and AVS
• Overlapped smoothing filter for VC-1
• Built-in post-processing function
• 90xn degree rotation
• Vertical/horizontal mirroring
• De-ringing
• De-blocking filter for MPEG-2/4
• Interface
• AMBA 32-bit APB interface for Host CPU
• AMBA 128-bit AXI interface for the external memory

Benefits

• Supports up to 4K(4096x2304) for full HD frame packing S3D
• Provides high performance for decoding at resolution of 1080p60
• Supports MVC(Multi-view Video Coding) for Blu-ray 3D
• Supports VP8(WebM), Theora as well as H.264 for HTML5
• Full coverage of streams on web browser and internet
• Pre-configurable decoding format enabling SoC designers to optimize for area and power
• Simultaneous decoding of multi-channel, multi-format stream.
• Memory challenge scheme including Tiled buffer map and 2D smart Cache
• Ultra-low power hardware architecture using multi-level clock gating
• Low host CPU resources under 1MIPS
• Proven performance with system level design that minimizes risk and time-to market