The HD video codec integrated solution comprises both multi-standard stream processing and video processing units in a standalone subsystem with minimum load on the host CPU.
Multi-standard decoding up to 720p HD resolution is supported for a wide and extensible range of video standards like H.264 BP, MPEG-4 SP/ASP (DivX), WMV9/ VC-1 SP/MP, and Google VP8 / WebM Project with upgradeability to further standards on the same device as needed.
For multi-standard video encoding like H.264 BP, MPEG-4 SP/ASP, and H.263, the HD video codec integrated solution supports an enhanced set of compression tools to achieve high video quality at reduced bitrates.
Still image JPEG encoding and decoding is supported at a pixel rate up to 45MPixel/s. Furthermore, a wide range of value-add image and video processing features can be performed in parallel to decoding or encoding.
The HD video codec integrated solution is available as a drop-in solution proven in real system environments and optimized to tolerate long memory access latencies of real-world systems. Extensive conformance testing has been performed to assure high product quality and full customer satisfaction. Through its field upgradeability in silicon, the HD video codec integrated solution provides a future-proof solution for extended product lifetimes through the addition of further standards and value-add features simply by firmware update.
Features
- Integrated solution
- v-MP2000SD video engine + v-SP1200 multistandar stream unit
- Minimum load on host CPU
- Multi-standard video codecs
- H.264/AVC, MVC
- MPEG-4, DivX, XviD, H.263, Flash (Sorenson)
- WMV-9/VC-1, RealVideo 8/9/10
- Google VP8 / WebM Project, On2 VP6
- MPEG-2, MPEG-1
- JPEG still image decode & encode up to 45MPixel/s
- Extensible to further standards on same silicon, e.g., H.265/HEVC
- Value-add image/video processing features
- Image enhancements, rotation, scaling
- Graphic overlays, blending, picture in picture
- Deinterlacing, denoising, deblocking
- Color conversion (RGB/YUV, YUV422/420)
- Image stabilization
- Performed in parallel to en-/decoding
- Very small silicon area footprint
- 310kgates core logic + 120kB memories
- Target technologies: 90nm…22nm
- 1.2mm2 silicon area in 40nm technology incl. sync. bus interfaces & all memories
- Low frequency requirements, ultra low power consumption for extended battery life
- Reduced switching activity for ultra low power consumption through optimized architecture
- Easy system integration
- SoC bus interface options: 32/64 bit, synchronous/ asynchronous
- AMBA AHB, AXI, OCP, others
- Short time to market & future proofness
- Reliable core, pre-verified in silicon
- Various FPGA prototyping platforms supported
- Field-upgradeable features and codecs by firmware download
- Ready to use
- Extensive conformance testing
- OpenMAX IL 1.1 support for seamless integration into mobile environments
- Complete solution
- Comprehensive applications suite, fully optimized for performance and resource usage
- Fully documented API in C source code for codecs and features
- Example integration in application framework
- One-stop offer including full integration support options
Benefits
- Integrated solution
- Minimum load on host CPU
- Extended value-add image/
- video processing features
- Very small silicon area and
- power consumption
- En- & decoding on single footprint
- Field-upgradeable codecs and features
Applications
- Feature phone, smart phone
- Mobile Internet device (MID)
- Car infotainment
- IPTV
- Mobile TV, DVB-H, DMB
- Streaming video
Block Diagram of the HD video codec integrated solution
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