Aizyc HDCP (High-bandwidth Digital Content Protection ) IP Core is a hardware and software based Digital Rights Management (DRM) solution for next generation multimedia SoCs.
The HDCP IP Core offers out of the box solution for SoC designers to integrate itself with minimal tweaking. The IP comes with supporting firmware in µC/OS-II, ThreadX and Linux. The HDCP2.0 IP core has both Tx and Rx and is highly configurable.
Authentication: A HDCP transmitter and receiver pair performs authentication before it does AV data transfer. Authentication involves a series of control messages to be exchanged among transmitter and receiver. As two things are established (1) receiver is authentic (2) a secret key that will be used for encrypting AV data.
Hardware and Software together play a role in authentication process. Software detects receiver when it is connected and directs the HW to start authentication. HW generates control messages and associated data for authentication, writes the data to registers and interrupts SW to let it transfer messages to Receiver. Control messages received from the other end are written to register set by SW thereby HW reads and performs authentication checks.
The IP core is portable to an ASIC or a FPGA. Along with the IP core, we will provide complete test environment with constraint randomized test cases and our full support during integration.
- Compliant to HDCP Rev 2.0
- Performs Authentication and Session management
- Performs encryption and decryption
- Supports repeaters.
- Supports 32-bit APB slave interface for register configuration.
- Linux based software is provided.
- AES-128 in CTR mode
- SHA-256 in HMAC mode
- Random Number Generator compliant to NIST-SP 800 90
- Gate count - 120K
- Platforms-ThreadX, Linux,Ucos-ii RTOs
- Scalable IP Core
- Compact Design
- Portability : ASIC, FPGA
- Validation on Xilinx Spartan 3
- Continuous support during integration, design and verification
- Synthesizable Verilog RTL
- Test bench and exhaustive Test cases
- Synthesis constraints and script files
- Sample AHB Slave Driver
- Documentation – User Manual, Verification plan , Validation Report, Synthesis, DFT and Integration Guidelines