Hybrid Memory Cube is a high performance memory solution that delivers unprecedented levels of bandwidth, power efficiency, and reliability. TekStart’s innovative HMC controller IP—designed specifically for, and in collaboration with, Micron—provides tremendous benefits to memory-bound applications, and particularly those that require high bandwidth and fast random access. And now this breakthrough IP is available for Altera's Programmable devices.
Supporting four links and comprising 64 transceivers running up to 15Gb/s, the interface yields bi-directional bandwidth of up to 240GB/s. The result is exceptionally high memory bandwidth and outstanding performance/Watt in a small but modular and highly scalable package. And because TekStart’s HMC controller core was engineered for designers familiar with DDR3 memory, it’s easy to use.
- Fully compliant HMC specification
- Fully synchronous, soft core implementation
- Supports HMC link operation at 10Gbp/s, 12.5Gbp/s, or 15Gbp/s
- Up to four HMC links managed by four HMC controllers
- Up to 240 GB/s of total interface bandwidth
- Supports for half-width (8-lanes) and full-width mode (16-lanes)
- AXI-like interface (light weight) or full AXI option
- Parameterized number of user interface ports
- Support for 256b, 512b, 768b, or 1024b read and write paths
- Packet sizes of 16b to 128b requests
- Power-on initialization
- Power state management
- Error detection and automatic retry
- Warm reset
- Link Retry
- Link retraining
- oken-based flow control
- Bit error injection mechanisms to support testability and characterization
- Available in 10GB, 12.5GB and 15GB configurations.
- Pico Computing EX-800 Prototyping board
- TekStart’s high-performance systems solutions dramatically accelerate parallelized algorithms with 100 to >1,000X speedups. But when those applications require large amounts of random access memory, performance hits a wall. The HMC architecture changes that equation, effectively knocking down the memory wall. When managed by TekStart’s powerful HMC Controller IP, the new memory technology enables a huge leap forward for high-performance computing, opening up new applications, markets, and business models. Massive performance improvements are realized immediately in packet processing, waveform processing, bioinformatics, image and video processing, and other memory/bandwidth-bound applications.
Block Diagram of the HMC Controller for Altera family of FPGAs