The IPX-JP2K module is an FPGA based JPEG 2000 decoder designed to meet the needs of high data rate processing for such demanding applications as Digital Cinema playback system and large picture and document archive access.
The FPGA flexibility enables custom combination of IPX-JP2K core with security IPX-AES and watermarking cores, to meet specific application requirements.
Efficiently combining on-chip hardware and software operations for an optimal co-design repartition of the decoding blocks, the IPX-JP2K also provides a unique postdeployment core renewability for field upgrade and update.
IPX-JP2K supports input bitrate up to 500 Mbps and can be adapted to provide any picture size (up to 2048 x 1080) and frame rate (up to 96 fps), supporting up to 7,6 Gbit/s output.
The IPX-JP2K can output in RGB, YUV or XYZ component formats and provides easy input and output data interfacing through a simple synchronous FIFO.
- Image Coding Format JPEG 2000 : ISO/IEC 15444-1
- Wavelet Transform Filter: 5/3 and 9/7 filters 18-bit fixed point precision
- Tiles: Single or multiple tiles
- Quality Layer: Single quality layer (Multiple quality layers optional)
- Resolutions: Up to 7 resolutions
- Code Block size: 32 x 32 pixels
- Code Block coding style: Standard JPEG 2000 options (Parallel mode optional)
- Input data-rate: Up to 500 Mbit/s
- Image size: Up to 2048 x 1080 pixels
- Frame-rate: Up to 96 FPS
- Output throughput: Up to 7,6 Gbit/s
- Component transform: RCT and ICT 18-bit fi xed point precision
- Color output format: RGB, XYZ and YUV
- Color Depth: Up to 12 bits per component
- Recommended FPGA: Virtex-4 SX35-10
- Affordable single chip solution
- Field upgradeable
- Configurable to any frame rate or size
- High bit-rate capable