MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes in TSMC (16nm) for Automotive
LDO Capless Fast Response Series ( Vin = 2.4-5.75V; Vo = 0.9-1.5V; Io = 30mA ) - UMC 130nm
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LDO IP
- Analog Front End: 16x 12-bit 200 MSPS ADCs, 14x Voltage DACs, 4x 250 MSPS DACs, 4x TVM, LDO
- Analog Front End: 2x 12-bit 4 GSPS IQ ADCs, 2x 12-bit 8GSPS IQ DACs, bandgap, temp sensor, PLL, 4 x LDO
- LDO Linear Voltage Regulator
- Ultra-low quiescent LDO voltage regulator in TSMC 22ULL
- Voltage Regulator LDO, Adjustable 1.1V Output
- Low Dropout (LDO) Capless Regulator