THE COST EFFECTIVE STEM FOR POWER MANAGEMENT WITH VOLTAGE ISLETS
Reducing the overall power consumption of a SoC is a critical issue for SoC designers, whether for nomad applications or for battery-driven industrial applications. An efficient way to reduce power consumption is to divide the SoC into voltage islets. However, in mature technological processes, SoC designers seeking to decrease power consumption also face the need for fabrication costs reduction.
Dolphin Integration addresses this dual challenge with the SESAME uHD-BTF Low Voltage standard cell library. As opposed to traditional general purpose libraries characterized at lower voltage, the uHD-BTF LV stem is fully optimized for low power designs. With optimized characterizations at low voltage, the uHD-BTF LV stem can be operated at 1.1 V for the 180 nm G process.
- High density
- Power reduction features
- Easy architectural implementation