The increasing popularity of smartphones and other multimedia enabled mobile devices along with the demand for enhanced multimedia features are pushing device manufacturers to integrate more advanced peripherals such as multi megapixel cameras and larger screens into their designs. Integrating these capabilities into mobile devices brings new challenges to the industry in terms of power, performance, time to market and overall system costs. To address these challenges, the Mobile Industry Processor Interface (MIPI®) Alliance defines and promotes open interface specifications such as the Camera Serial Interface (CSI-2) Display Serial Interface (DSI) and UniPro which all use the MIPI D-PHY. As a MIPI Alliance contributor and leading provider of digital and Mixed-Signal IP, Synopsys offers a high quality, silicon proven D-PHY solution available today in advanced technology nodes
- Aggregate throughput up to 6Gbps in 4 Data lanes
- Master, Slave and Rx configurations
- Support for the Protocol Peripheral Interface (PPI)
- Low power Escape modes and ultra Low Power Modes
- Shutdown mode
- SCAN and Loopback BIST modes
- Extensive access to internal programmability registers
- High-quality, silicon-proven design available on multiple foundries and process nodes
- Compliant with MIPI D-PHY Interface Specification, rev. 1.1
- Flexible implementation enables multiple user scenarios
- Up to 1.5Gbps per lane
- Application notes.
- Assembly guidelines.
- Design files kit: Behavioral model; .LEF file; .LIB file; GDSII layout database.