TSMC 28nm HPM MIPI MPHY Receiver Supporting both HS-G1 and HS-G2 modes and usable for DigRFv4, LLI, SSIC and UniPro-based applications such as CSI-3 and JEDEC/UFS
The MIPI MPHY Receiver integrates a MIPI® MPHY-compatible highspeed receiver that supports up to 3GHz data transfer, and a low-power receiver that supports data transfer in lower power mode. The IP supports the specifications described in v1.0 of the M-PHY spec. The lane management is integrated, and interfaces with the controller.
Mixed-signal M-PHY hard-macro Receiver solution
Designed to MIPI® v1.0 MPHY specification
MPHY RMMI interface supports UniPro, DigRF and LLI protocols