MIPI MPHY Receiver supporting up to 3Gbps (HS-G2) data-rate meant for DigRFv4, UFS, CSI-3 applications
The MIPI MPHY Receiver integrates a MIPI M-PHY receiver that supports data-rates up to 3000Mbps per lane and a low-speed receiver that supports both SYS and PWM modes.
The IP is based on Version 1.4 of the MIPI M-PHY specifications. The RMMI interface is integrated and interfaces with CSI-3, DigRFv4, LLI, SSIC and UFS controllers. The implementation is modular and up to 4 lanes can be connected in parallel to increase the through-put.