IRIS-CLEAN is a synthesizable IP core that can be used in order to perform morphological cleaning in any binary image. This IP core uses only on-FPGA memory and is tested for real FPGA implementation using IRIDA Labs specialized test bench.
- Morphological cleaning removes isolated pixels (individual 1s that are surrounded by 0s).
- ITU BT 656 Compatible
- Morphological Cleaning
- No need for External Memory
- High Refresh Rate
- Small Size
- High-Clock Rate
- Support for various FPGA families.
- Morphological operations are very useful in Computer Vision applications since they allow the extraction of image components that are useful in the representation and description of a shape of a region. In addition morphological techniques are used for pre or post-processing of images.
- IRIS-CLEAN is available as synthesizable HDL soft core for ASIC and FPGA technologies and includes all these elements that guarantee a successful embodiment in proprietary designs. In addition IRIDA Labs provides:
- Complete product documentation including de- tailed specifications
- Software bit-accurate model (MATLAB/Simulink model)
- A powerful test-bench (Choice between MAT- LAB/Simulink and HDL based environments)