Configurable PCI Express 2.0, 1.1 Controller IP for ASIC/SoC

Xilinx Achieves PCI Express Compliance Across its All Programmable 28nm Devices
Google TV Devices with Vivante GPU Cores Ready for Android Jelly Bean Update
Automated ECO Flow for overall cycle time reduction
SoC Interconnect Verification Challenge
Where Have All the IP Vendors Gone? Part 2: Market Maturation
Enpirion's Value is Not Necessarily in IP
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