The MorethanIP P6GQSX programmable switch provides up 6Gbps-switching capability, which can be used as required by the User application. The MorethanIP switch is implemented as a System on Chip (SOC) and it embeds a Hardware switch engine, for performance, and a 32-Bit processor, which performs learning, aging, migration tasks and which can be programmed to implement any other function such as Spanning Tree or any user specific task.
The Switch Engine provides a programmable number of 32-bit Atlantic Interfaces to build up a complete switch solution with flexible system and line interfaces depending on application requirements.
The switch engine is capable of prioritizing incoming traffic in up to 8 different priorities depending on VLAN (802.1q) or IP TOS/COS (DiffServ) values and can implement multiple output queues to provide different service quality to the prioritized traffic.
The MorethanIP P6GQSX Core is available on Altera Stratix FPGAs (Field Programmable Gate Array), which provides a quick time-to-market. The Switch Core can be migrated to Altera Hardcopy or ASIC devices to reduce costs.
Features
- Integrated Ethernet Switch engine with programmable number of SOC (System on Chip) ports seamless compatible with MorethanIP 10/100/1000 MAC Core
- 32-bit switching engine operating at frequencies up to 200MHz (+) on Altera Stratix-II FPGA providing 6.4Gbps (+) non-blocking switching capacity
- Implements hardware three-stage switching look-up mechanism providing a learning capacity of up to 2K MAC addresses
- Switching table range can be reduced, for optimized Firmware operation, to support 700 or 1K MAC addresses
- QOS Support with a high and a low priority output queue per port
- Modular QoS implementation allowing extension of QoS support to up to 8 queues per port
- Weighted De-queueing Selection Algorithm
- Classification and Priority assignment based on Port Number, Ipv4 DiffServ Code Point Field, Ipv6 Class of Service and VLAN Priority (IEEE802.1q)
- Programmable firmware operation with Static or Dynamic (Learning, Aging) switching tables
- Embedded 32-Bit processor for MorethanIP standard switching firmware (Learning, Aging, Migration and look-up management) and user specific tasks
- Support Ethernet Multicast, Broadcast with flooding control to avoid unnecessary duplication of frames
- Multicast and Broadcast resolution with VLAN domain verification providing a strict separation of up to 32 VLANs
- Supports VLAN frames reception and transmission and VLAN domain protection
- Optional configurable VLAN manipulation and filtering on input ports (tag insertion/modification) and output ports (tag deletion)
- Configurable to do pure VLAN switching without MAC address lookup
- Programmable number of IP Core interconnect Atlantic ports which can be connected to up to 16 Ethernet MACs, packet interface queues or custom logic
- Can be used in managed or unmanaged implementations
- Event and status signals which can be used to monitor port activity, error conditions or any user specific event
- Available on Altera Stratix/Stratix-II/Cyclone-II FPGAs, Altera Hardcopy devices or ASIC
- Switch Software included for Nios-II Processor to allow custom specific software development
- Fully Integrated in Altera SOPC Builder
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