Phase Shift Keying is a digital modulation scheme that conveys data by changing, or modulating, the phase of a reference carrier signal.
- 1. DVB compliant QPSK/BPSK/8PSK Coherent Demodulator.
- 2. Square Root of Raised Cosine Filtering with Roll-Off: 35%, 25%, 20%.
- 3. Carrier Recovery using “Costas Loop”
- 4. Symbol Timing Recovery using “Early late gate Algorithm”
- 5. Synchronous design
- 6. Programmable Sampling Rates
- 7. Second Order Loop Filters for Carrier Recovery
- 8. Accepts the digital data from two ADC's as input and outputs the demodulated data bits.
- 9. Available for Xilinx FPGA and ASIC
- 10. Compatible, flexible and easy integration
- with other modules.
- 1. Verilog RTL source code
- 2. Test benches
- 3. Synthesis and Simulation scripts.
- 4. Detailed user documentation, including RTL source code documentation.