The I/O Layer Initiator Core converts AMBA AHB bus transactions into RapidIO Input/Output Logical Layer transactions. It gives AHB masters direct, transparent access to remote endpoint memory or peripherals across a RapidIO switch fabric.
Like all Praesum RapidIO IP solutions, it has been partitioned to support the Praesum fine-grained RapidIO IP architecture. This ensures that only the RapidIO functions needed for each application must be included. This saves valuable power and device resources in SOC ASIC or FPGA platforms
- Compliant with Rev. 1.3 of the Input/Output Logical Layer specification.
- 32-bit AHB interface compliant with Rev. 2.0 of the AMBA standard.
- Seamless interface to Praesumís LP-LVDS and LP-Serial physical layer cores.
- Built-in Management Bridge supports local or remote maintenance operations.
- Available either as optimized FPGA netlists, or Verilog RTL source.