Despite dynamic power reduction made possible by more advanced process nodes, the increasing complexity of designs results in a real challenge to get power consumption back in control.
To address this power challenge, a solution is to select a multiple voltage architecture with blocks running independently at different voltages depending on the operating modes. However, this demands a complete solutions for all elements of the logic design.
The solution is introduced with a complete Dual Voltage Panoply of memory arrays, memory registers and standard cells by Dolphin Integration. The Dual Voltage Panoply is characterized for 1.2 V and 0.9 V for the 130 nm technological process
- Power reduction features
- Decrease of fabrication costs
- Ultra low leakage