Writing its program into a ROM puts paradoxical demands: enabling high-density while postponing the program layers to the least dense levels. PHOENIX is such a late-programmable but dense ROM thanks to a key bit-cell patent for reaching ultra-high-density and low dynamic power with large capacities beyond 1 Mbit. It stars the brand-new proprietary architecture Phoenix optimized for extremely-low leakage. It embeds smart and optimal pre-charge circuitries consuming a mere 1.2 uA for a 6-Mbit instance in TSMC 65 nm LP!
- Key “two in one” patent on bitcells for ultra-high-density with large capacities beyond 1 Mbit
- Ultra-low leakage even in generic process:
- no leakage in memory plane
- minimal leakage in memory periphery
- Optimized for high DfY i.e. no compromise at the expense of Read Margin and any other design margin