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SD 4.0 UHS-2 PHY

The SD 4.0 UHS-2 PHY IP achieves 300MB/s that is the maximum speed in Half Duplex mode for UHS-II (Gen1) with the low power consumption. This SD 4.0 UHS-2 PHY IP can be applied to both the device and host sides including SDIO and hence it can be utilized for SOCs for various applications including SD cards, digital cameras, digital videos, digital TVs, media players and personal computers. The test chip has already been verified by silicon.

Features

Bi-directional Receiver/Transmitter (2ch) Supporting both Full Duplex and Half Duplex Modes
390Mbps to 1.56Gbps/ch (Upper Range: 780Mbps ~ 1.56Gbps, Lower Range: 390Mbps ~ 780Mbps)
RCLK Frequency: 26~56MHz
Power Supply Voltages: 1.0V(1.2V)/3.3V or 1.0V(1.2V)/1.8V
Operating Temperature (Tj): -40degreeC ~ 125degreeC
Clock Recovery
PLL Clock Synthesizer
8B10B Encoder / Decoder
BIST
On-chip Termination Resistors
Customizable RTL based Parallel Link Interface Selectable between 8b and 16b
Programmable PHY Parameters

Benefits

SLI UHS-II PHY IP enables 300MB/s data transfer rate for SD applications. SLI PHY perfectly matchs with upper layer solutions from SLI partners.

Deliverables

Simulation Models
LEF
LVS Netlist
GDSII
Data Sheet
Implementation Guides

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