The ARM® Cortex™-A5 processor is the smallest, lowest power ARM multicore processor capable of delivering the internet to the widest possible range of devices: from ultra low cost handsets, feature phones and smart mobile devices, to pervasive embedded, consumer and industrial devices.
Both the extremely area and power efficient Cortex-A5 uniprocessor and the scalable Cortex-A5 MPCore multicore processors are supported by a rich set of features and ARMv7 architectural functionality to deliver a high-performance and low-power solution across both application specific and general purpose designs.
The Cortex-A5 processor includes TrustZone® security technology along with a NEON™ multimedia processing engine first introduced with the Cortex-A8 processor.
NEON technology is a 128-bit SIMD (Single Instruction, Multiple Data) architecture extension for the Cortex-A series processors, providing flexible and compelling acceleration for intensive multimedia applications.
The Cortex-A5 uniprocessor provides a high-value migration path for the large number of existing ARM926EJ-S™ and ARM1176JZ-S™ processor licensees. By delivering better performance than the ARM1176JZ-S processor within the same power and silicon area footprint of the ARM926EJ-S processor, the Cortex-A5 uniprocessor offers nearly twice the power-efficiency relative to these earlier and extremely popular predecessors. This increases the quality of the user experience while reducing costs and end-user device size.
This performance is further enhanced by the Cortex-A5 multicore processor which utilizes the successful ARM MPCore technology. The widely-adopted ARM MPCore technology increases performance scalability and control over power consumption to exceed the performance of today’s comparable high-performance devices while remaining within the tight mobile power constraints. To date ARM MPCore processors have been licensed by more than 15 leading semiconductor companies including Broadcom, NEC Electronics, NVIDIA, Renesas Technology, Toshiba and Sarnoff Corporation, and have been implemented in numerous applications on the market today. This technology greatly expands the addressable application spectrum while enabling new and more efficient modes of operation.
- Single issue microprocessor core (limited dual issue of branches)
- 8-stage main integer pipeline
- Optional NEON and Floating Point Units
- Optimized for industry leading power efficiency and area
- ARMv7 architecture compliant including:
- Thumb®-2 technology for greater performance, energy efficiency, and code density
- NEON signal processing extensions to accelerate media codecs such as H.264 and MP3
- Jazelle DBX and Jazelle RCT Java-acceleration technology to optimize Just In Time (JIT) and Dynamic Adaptive Compilation (DAC), and reduce memory footprint by up to three times
- TrustZone technology for secure transactions and Digital Rights Management (DRM)
- Optimized Level 1 Caches
- Performance and power optimized 40LP RAMs available from ARM
- Configurable from 4K to 64K
- Dynamic Branch Prediction
- Enabled by branch target and global history buffers
- Achieves 95% accuracy across industry benchmarks
- Limited dual issue of direct branches provides uplift in performance
- Memory System
- Single-cycle load-use penalty for access to the L1 cache
- Optimized AMBA AXI memory system provides up to 3x the memory bandwidth off ARM1176JZ-S
- Support for multiple outstanding transactions to the external memory to fully utilize the CPU