The Xelic SONET/SDH Transport Processor Core (XCS768F) performs transport overhead processing, aligns incoming SONET/SDH frames and provides overhead interpretation with error detection and performance monitoring. The XCS768F contains independent transmit and receive processors with dedicated external ports for overhead insertion and extraction. Incoming/outgoing data is transferred at an STS-768/STM-256 rate using a 256-bit data bus operating at 155.52Mb/s.
- Suitable for FPGA and/or ASIC implementations.
- Provides for bypass and normal (transport overhead processing) modes of operation.
- Implements 16-bit register interface for programming of internal registers.
- Inserts transport overhead through internal register programming and/or external overhead ports.
- Provides transmit facility and terminal loopback options for diagnostic purposes.
- Supports transport overhead insertion/extraction through dedicated external section DCC, line DCC, section orderwire, line orderwire, and transport overhead ports.
- Supports optional SONET/SDH frame scrambling with programmable scrambler corruption capability for diagnostic purposes.
- Allows for the insertion/extraction of programmable 1, 16 or 64 byte trace messages.
- Calculates and inserts B1/B2 parity information with optional corruption capability.
- Supports programmable insertion of line AIS.
- Provides flexible frame alignment capability with programmable options for OOF and LOF algorithm state transitions. Diagnostic capability is provided to force LOF and OOF state conditions.
- Supports the programmable insertion of Line AIS frames.
- Provides a variety of 16-bit saturating performance counters (configurable for bit or block type).
- Detects LOS, LOF, LOA, OOF, TIM, TIU, B1 error, SD, SF, B2 error, AIS-L, and RDI-L conditions and provides optional interrupt generation.
- Xelic cores are optimized to keep resource utilization low enabling designers to include more functionality in a single FPGA implementation.
- Xelic offers flexible licensing terms with single use, source code options available.
- Xelic cores come complete with a database which contains a verification environment (generators, checkers, models, etc), an extensive suite of self checking tests, synthesis scripts, and a comprehensive set of core documentation (product brief, datasheet, fact sheet, etc.).