Sub-frame latency JPEG 2000 decoder IP Core

Features

• Sub-frame latency decoding (< 5ms)
• Full image decoding (no tiling)
• Compliant with JPEG 2000 (ISO/IEC 15444-1)
• Integrated Intellectual Property (IP) core for JPEG 2000
• Single-chip FPGA solution:
• HD: 720p30-180, 1080i30-180, 1080p30-90
• DCI: 2K, 4K
• Custom frame sizes up to 8K or larger
• Customizable input bit rate: up to 200Mbps / 400Mbps
• YUV 4:2:2 color space
• Supported JPEG 2000 parameters:
• Pixel depth: up to 12 bits per color component
• Full-frame decoding (no tiling)
• Fully autonomous decoder with automatic parameter extraction
• Minimal user intervention
• Can be integrated with Barco Silex cryptography cores for advanced stream protection