As the leading and only provider of gigabit Ethernet in 40-nm FPGA devices, Altera offers the Triple Speed Ethernet MegaCore® function, allowing you to easily build systems with a 10/100/1000-Mbps Ethernet network connection. Altera Triple Speed Ethernet consists of a 10/100/1000-Mbps Ethernet MAC and PCS IP. This IP enables Altera FPGAs to interface to an external Ethernet PHY device, which in turn interfaces to the Ethernet network.
The Triple Speed Ethernet external Ethernet serial interfaces (SGMII and 1000Base-X) are available in all Altera FPGA and ASIC devices with serial transceivers, and in Altera devices with LVDS I/O with dynamic phase alignment (DPA) that can operate up to 1.25 Gbps. The LVDS I/O enable very scalable multi-port gigabit Ethernet system designs while leaving serial transceivers for higher performance protocols. The parallel interfaces are also available in Cyclone®, Arria® GX, and Stratix® FPGA families and HardCopy® ASIC families.
- Complete 10/100/1000-megabits per second (Mbps) Ethernet intellectual property (IP) with all the necessary IP modules
- 10/100/1000-Mbps media access controller (MAC), physical coding sublayer (PCS) and physical medium attachment (PMA)
- Flexible IP options
- MAC only, PCS only, MAC + PCS, MAC + PCS + PMA, PCS + PMA
- Many options for various applications and sizes as small as 900 logic elements (small-MAC)
- Standard-based statistics counters supporting SNMP Management Information Base (MIB and MIB-II) and Remote Network Monitoring (RMON)
- Parameterizable FIFO or FIFO-less MAC options
- Optimized multi-port (1, 4, 8, ... to 24) option for scalable high-performance applications
- Many external Ethernet interface options for various Altera® device families
- MII (10/100 Mbps), GMII, RGMII and SGMII (10/100/1000 Mbps), 1000BASE-X, and TBI (1 Gbps)
- Management data I/O (MDIO) for external PHY device management