The ARM® Artisan® Ultra High Density Memory Compilers provide SoC designers with a comprehensive solution, delivering maximum performance with the lowest possible power and area. Artisan High Density Single Port Register File compilers are based on a power-efficient architecture that effectively reduces static and dynamic power consumption. These memory compilers satisfy critical power-saving demands by implementing optional power management modes not available in generic designs. Utilizing features like aspect ratio control and area optimized power routing, Artisan High Density Single Port Register File compilers also enable more efficient floor planning and layout. Additionally, the minimized footprint and low power consumption of Artisan High Density Single Port Register File memory compilers make them ideal for cost effective, low power SoC designs.
- Aspect ratio control for efficient floor planning
- Optional support for soft error repair through ECC
- User programmable read margin
- ArtiGridâ„˘ ringless power routing enables greater area efficiency
- Each ARM product is delivered with a full suite of design views and models that support industry leading design tools. Front End (FE) design and complete (FB) tapeout views can be downloaded from the ARM DesignStart website at: http://designstart.arm.com.